1. Field of the Invention
The present invention relates to a method for fabricating a semiconductor device, and in particular to an improved method for fabricating a semiconductor device which can facilitate the semiconductor device to be operated at a high speed by reducing a wiring resistance of a gate electrode.
2. Description of the Background Art
In general, in order to operate a semiconductor device at a high speed, there has been known a technique of forming a tungsten suicide layer on a polysilicon layer which is a gate electrode of a peripheral circuit transistor of a semiconductor memory integrated circuit devices. In addition, there has been known a technique of forming a self-aligned silicide, namely a salicide layer on a source/drain of the peripheral circuit unit transistor.
FIG. 1 illustrates a structure of a peripheral circuit unit transistor of a conventional semiconductor device. Referring to FIG. 1, a gate insulation film 11 is formed on a semiconductor substrate 10. A gate electrode 12 is formed on the gate insulation film 11. The gate electrode 12 includes a polysilicon layer 12a and a tungsten silicide 12b formed thereon. A sidewall spacer 14 is formed on the semiconductor substrate 10 at the both sides of the gate electrode 12. An impurity layer 13 having a shallow junction which is called a lightly doped drain LDD is formed in the semiconductor substrate 10 below the sidewall spacer 14. An impurity layer 15 having a deep junction which is called a source/drain is formed in the semiconductor substrate 10 beside the impurity layer 13. A self-aligned silicide layer 16 is formed on the gate electrode 12 and the source/drain 15.
However, in the gate electrode structure of the conventional semiconductor device, the tungsten silicide layer is formed on the polysilicon layer, and thus an integration degree of the semiconductor device is increased. Accordingly, when the gate electrode is reduced in size, the polysilicon layer and the silicide layer are also decreased in size, and thus the wiring resistance of the gate electrode cannot be effectively controlled.